Kc89c72 Datasheet //top\\ [WORKING]

No Connection (or internal connection depending on die variant) Analog Channel B Audio Output for Channel B 4 Analog Channel A Audio Output for Channel A 5 No Connection 6 I/O Port B, Bit 7 7 I/O Port B, Bit 6 8 I/O Port B, Bit 5 9 I/O Port B, Bit 4 10 I/O Port B, Bit 3 11 I/O Port B, Bit 2 12 I/O Port B, Bit 1 13 I/O Port B, Bit 0 14 I/O Port A, Bit 7 15 I/O Port A, Bit 6 16 I/O Port A, Bit 5 17 I/O Port A, Bit 4 18 I/O Port A, Bit 3 19 I/O Port A, Bit 2 20 I/O Port A, Bit 1 21 I/O Port A, Bit 0 22 Master timing input (1 - 2 MHz square wave) 23 Internal testing pin (leave disconnected) 24 Chip Select (active low) 25 Bus Control 2 26 Main 5V Power Supply Input 27 Bus Direction Control Line 28 Bus Control 1 29 Control configuration pin 30 Bidirectional Data Bus, Bit 7 31 Bidirectional Data Bus, Bit 6 32 Bidirectional Data Bus, Bit 5 33 Bidirectional Data Bus, Bit 4 34 Bidirectional Data Bus, Bit 3 35 Bidirectional Data Bus, Bit 2 36 Bidirectional Data Bus, Bit 1 37 Bidirectional Data Bus, Bit 0 38 Analog Channel C Audio Output for Channel C 39 Internal testing pin (leave disconnected) 40 Master System Reset (Active Low) 3. Internal Architecture & Register Map

: Set both BC1 = 0 and BDIR = 0 to release the shared bidirectional data lines.

: Three independent programmable sound channels.

Controls the properties of the pseudo-random noise sequence generator.